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Etternavn: Jahre   Fornavn: Magnus   Alle publ. kanaler

Viser treff 1-38 av 38

2015
1 Bahmann, Helge; Reissmann, Nico; Jahre, Magnus; Meyer, Jan Christian.
Perfect Reconstructability of Control Flow from Demand Dependence Graphs. ACM Transactions on Architecture and Code Optimization (TACO) 2015 ;Volum 11.(4) s. -
NTNU Untitled
 
2014
2 Cebrian, Juan; Jahre, Magnus; Natvig, Lasse.
Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks. I: IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE. IEEE Computer Society 2014 ISBN 978-1-4799-3605-2. s. 66-75
NTNU Untitled
 
3 Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse.
Victim Selection Policies for Intel TBB: Overheads and Energy Footprint. I: Architecture of Computing Systems – ARCS 2014. Springer 2014 ISBN 978-3-319-04890-1. s. 13-24
NTNU Untitled
 
4 Jahre, Magnus.
Graph-based Performance Accounting for Chip Multiprocessor Memory Systems. I: Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT). Association for Computing Machinery (ACM) 2014 ISBN 978-1-4503-2809-8. s. 473-474
NTNU Untitled
 
5 Nikitin, Nikita; Jahre, Magnus.
Patterned Heterogeneous CMPs: The Case for Regularity-Driven System-Level Synthesis. I: 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14). IEEE Computer Society 2014 ISBN 9781479937639. s. 172-177
NTNU Untitled
 
6 Reissmann, Nico; Meyer, Jan Christian; Jahre, Magnus.
A Study of Energy and Locality Effects using Space-filling Curves. I: Proceedings of the 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2014) and IPDPS 2014 Workshops (IPDPSW 2014). IEEE Computer Society 2014 ISBN 978-1-4799-4117-9. s. 815-822
NTNU Untitled
 
7 Umuroglu, Yaman; Jahre, Magnus.
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. I: 2014 32nd IEEE International Conference on Computer Design (ICCD). IEEE Computer Society 2014 ISBN 978-1-4799-6492-5. s. 432-439
NTNU Untitled
 
8 Umuroglu, Yaman; Jahre, Magnus.
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. IEEE International Conference on Computer Design; 2014-10-19 - 2014-10-22
NTNU Untitled
 
9 Umuroglu, Yaman; Jahre, Magnus.
Memory-Centric Design for FPGA SpMV Accelerators. I: ACACES 2014: poster abstracts. : HiPEAC 2014 ISBN 9788890580628. s. 9-12
NTNU Untitled
 
10 Umuroglu, Yaman; Jahre, Magnus.
Memory-Centric Design for FPGA SpMV Accelerators. International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems; 2014-07-13 - 2014-07-19
NTNU Untitled
 
2013
11 Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse.
Challenges of Reducing Cycle-Accurate Simulation Time for TBP Applications. Procedia Computer Science 2013 ;Volum 18. s. 1814-1823
NTNU Untitled
 
12 Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse.
On the Energy Footprint of Task Based Parallel Applications. I: Proceedings of the 2013 International Conference on High Performance Computing & Simulation (HPCS 2013). IEEE conference proceedings 2013 ISBN 978-1-4799-0836-3. s. 164-171
NTNU Untitled
 
13 Jahre, Magnus.
Effektiv elektronikk. Dagens næringsliv 2013
NTNU Untitled
 
14 Jahre, Magnus.
Forskningsfyrtårnet NTNU Energy Efficient Computing Systems (EECS). Elektronikk : tidsskrift for IT og telekom 2013 (5) s. 44-45
NTNU Untitled
 
15 Jahre, Magnus; Cebrian, Juan; Kjeldsberg, Per Gunnar; Aunet, Snorre; Natvig, Lasse.
NTNU - Energy Efficient Computing Systems (EECS). 8th International Conference on High-Performance and Embedded Architectures and Compilers; 2013-01-21 - 2013-01-23
NTNU Untitled
 
16 Reissmann, Nico; Jahre, Magnus.
Energy Efficient Memory Systems. I: Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems. Academia Press 2013 ISBN 9789038221908. s. 49-52
NTNU Untitled
 
17 Reissmann, Nico; Jahre, Magnus.
Energy Efficient Memory Systems. Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems; 2013-07-14 - 2013-07-20
NTNU Untitled
 
2012
18 Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse.
Towards Efficient Simulation of Task Based Parallel Applications. I: Norsk informatikkonferanse NIK 2012; Universitetet i Nordland 19 – 21 november 2012. Akademika forlag 2012 ISBN 978-82-321-0013-2. s. 153-164
NTNU Untitled
 
2011
19 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Exploring the Prefetcher/Memory Controller Design Space: An Opportunistic Prefetch Scheduling Strategy. Lecture Notes in Computer Science 2011 ;Volum 6566. s. 135-146
NTNU Untitled
 
20 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Storage Efficient Hardware Prefetching using Delta-Correlating Prediction Tables. Journal of Instruction-Level Parallelism 2011 ;Volum 13.
NTNU Untitled
 
21 Jahre, Magnus.
Computational computer architecture. Meta 2011 (4) s. 10-12
NTNU Untitled
 
2010
22 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching. Lecture Notes in Computer Science 2010 ;Volum 5.(1)
NTNU Untitled
 
23 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching. I: Proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC). Springer 2010 ISBN 3-642-11514-4. s. 247-261
NTNU Untitled
 
24 Jahre, Magnus.
DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems. International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2010); 2010-01-25 - 2010-01-27
NTNU Untitled
 
25 Jahre, Magnus.
Multi-core Memory Systems - Research Results, Methods and Future Plans. ARM External Research Speaker Conference (ERSC); 2010-10-20
NTNU Untitled
 
26 Jahre, Magnus; Grannæs, Marius; Natvig, Lasse.
DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems. Lecture Notes in Computer Science 2010
NTNU Untitled
 
27 Jahre, Magnus; Natvig, Lasse.
Computational Computer Architecture Research at NTNU. ERCIM News 2010 (81)
NTNU Untitled
 
28 Jahre, Magnus.
Managing Shared Resources in Chip Multiprocessor Memory Systems. : NTNU 2010 (ISBN 978-82-471-2287-7) 238 s. Doktoravhandlinger ved NTNU(159)
NTNU Untitled
 
2009
29 Jahre, Magnus.
A Light-Weight Fairness Mechanism for Chip Multiprocessor Memory Systems. 6th ACM Conference on Computing Frontiers; 2009-05-18 - 2009-05-20
NTNU Untitled
 
30 Jahre, Magnus.
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures. 11th IEEE International Conference on High Performance Computing and Communications (HPCC); 2009-06-25 - 2009-06-27
NTNU Untitled
 
31 Jahre, Magnus; Grannæs, Marius; Natvig, Lasse.
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures. I: 11th IEEE International Conference on High Performance Computing and Communications (HPCC 2009). IEEE Computer Society 2009 ISBN 978-0-7695-3738-2. s. 622-629
NTNU Untitled
 
32 Jahre, Magnus; Natvig, Lasse.
A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors. Lecture Notes in Computer Science 2009
NTNU Untitled
 
33 Jahre, Magnus; Natvig, Lasse.
A Light-Weight Fairness Mechanism for Chip Multiprocessor Memory Systems. I: Proceedings of the 6th ACM Conference on Computing Frontiers. Association for Computing Machinery (ACM) 2009 ISBN 978-1-60558-413-3. s. 1-10
NTNU Untitled
 
34 Sindre, Guttorm; Natvig, Lasse; Jahre, Magnus.
Experimental Validation of the Learning Effect for a Pedagogical Game on Computer Fundamentals. IEEE Transactions on Education 2009 ;Volum 52.(1) s. 10-18
NTNU Untitled
 
2008
35 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Low-Cost Open-Page Prefetch Scheduling in Chip Multiprocessors. I: IEEE International Conference on Computer Design, 2008. IEEE Computer Society 2008 ISBN 978-1-4244-2658-4. s. 390-396
NTNU Untitled
 
36 Grannæs, Marius; Jahre, Magnus; Natvig, Lasse.
Low-Cost Open-Page Prefetch Scheduling in Chip Multiprocessors. ACACES Summer school, HiPEAC; 2008-07-13 - 2008-07-19
NTNU Untitled
 
2007
37 Jahre, Magnus.
Performance Effects of a Cache Miss Handling Architecture in a Multi-core Processor. Norsk informatikkonferanse 2007; 2007-11-19 - 2007-11-21
NTNU Untitled
 
38 Jahre, Magnus; Natvig, Lasse.
Performance Effects of a Cache Miss Handling Architecture in a Multi-core Processor. I: Norsk Informatikkonferanse (NIK 2007). Tapir Akademisk Forlag 2007 ISBN 978-82-519-2272-2. s. 141-152
NTNU Untitled